- Published on Wednesday, 12 January 2011 19:00
- Written by Douglas Eadline
- Hits: 1649
Back in November (yes, November) at SC11, I had a chance to sit down with Jim Ang, Technical Manager at Sandia National Laboratories in Appro's booth. Appro was gracious enough to allow me to interview Jim about his initial experiences with Intel's new Knights Ferry hardware and software. Similar to a GP-GPU from NVidia or AMD, Knights Ferry works in conjunction with a host server and is based on parallel x86 cores or the Intel MIC Architecture.
If you are unfamiliar with the Intel MIC architecture, I strongly suggest reading Greg Pfister's blog on MIC and the Knights. Greg's has been carefully following this technology and provides the best summary of the MIC architecture to date. (i.e. go read this)
Currently, Knights Ferry is available only to select individuals, including Jim Ang's group at Sandia, and represents a potential new direction in HPC. Appro has delivered an Xtreme-X™ test bed cluster that will eventually hold 42 Knights Corner enhanced nodes, the production version of Knights Ferry. The standard Intel Xeon nodes will be connected with Mellanox QDR IB.
Beyond the expected high performance, the most significant aspect of the Intel MIC architecture is the software, which is the focus of my questions to Jim. Basically, MIC is x86 compatible and Intel has claimed that porting codes previously written using Intel software tools can be recompiled to run on the Intel MIC. (Although, I have never really encountered a simple recompile, I understand what they mean.) This approach is in stark contrast to using CUDA or OpenCL for a typical GP-GPU. (Note: The OpenACC Group may have something to say about this issue.) You will have to watch the short video to learn about some of the early experiences Jim and his team have had with Knights Ferry. Expect to hear plenty about Intel MIC as the year progresses.